I have a product with up to 12 displays, driven over 3 SPI buses, each SPI bus having 4 displays. The displays are 240x240 16 bit color, driven at 27mhz. I have an external 32MB 16bit SDRAM on this device, max bandwidth being around 100MB. (STM32F769)
My goal is the ability to maximize the parallel driving of these buses, so I have built a queue system where requests get queued to send to a chosen display via dma.
The way lvgl seems to be written currently I see some (possible) gotchas.
There are at least 3 “while(vdb->flushing)” in the code, which basically means the complete task blocks until the buffer is freed. Is there some task ordering that will allow the other displays tasks to continue until their tasks are completed, and their outbound flushing is called?
My idea is to initialize 12 disp_drv, but it is unclear to me how tasking will work with this many displays.